Intel Unveils 7nm GPU Chip: New Xe Architecture Integrates HBM Memory

At the SC 19 Supercomputing Conference, Intel officially announced that its Xe architecture GPU for high-performance computing, Ponte Vecchio , will also launch Intel’s 7nm process. Intel will spend $5 billion on aurora aurora supercomputing for the U.S. Department of Defense in 2021.

The Xe GPU architecture is a very flexible, scalable, unified architecture that is targeted into microarchitecture slotted into virtually every computing, graphics domain, including billions of high-performance computing, deep learning and training, cloud services, multimedia editing, workstations, games, lightweight laptops, portable devices, and more.

Specifically, the Xe architecture used by HPC can be greatly expanded to 1000, and each unit is newly designed, fp64 double-precision floating-point computing power is 40 times the current.

In the Xe HPC architecture, the EU unit connects to HBM’s high bandwidth memory via the XEMF (Xe Memory Fabric) bus, while integrating a large, consistent cache “Rambo” that is accessible to both the CPU and GPU, connecting multiple GPUs together to provide extreme memory bandwidth and FP64 floating-point performance, and supports memory/cache ECC error correction, and the Strong SRAS.

In terms of encapsulation, EMIB is used to connect GPUs to HBM, and Foveros is used to interconnect the Rambo cache, which is shared by multiple GPUs on the same mediation layer. Both greatly increase bandwidth efficiency and density.

Intel Unveils 7nm GPU Chip: New Xe Architecture Integrates HBM Memory

At the launch site, Intel’s PPT failed to clearly show the internal structure of the Ponte Vecchio GPU, and today Raja Koduri, Intel’s chief architect and vice president of high-performance GPU projects, released an internal structure diagram of the Ponte Vecchio chip. You can see the left and right sides have 8 sets of Xe calculation core, currently only know is 7nm process manufactured, the specific information inside is not published.

In addition to the Core of Xe Computing, the Ponte Vecchio GPU is highly technical, complemented by Intel’s 10 billion-dollar CXL bus, XEMF bus, and TECHNOLOGIEs such as EMIB and Foveros packaging.

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