Among the six pillars of Intel’s technology, packaging technology and process process side by side, become the most fundamental and basic link, mainly because today’s semiconductor technology and chip design is becoming more and more complex, the previous single chip design has become unsustainable, we must open up new combinations.
Today, most of the chips in smartphones, PCs, and servers are in fact sealed by several smaller chips in a rectangular package, including CPU, GPU, memory, I/O and other modules, how to effectively combine different modules to ensure smooth communication with each other, is a critical link.
Intel offers a variety of designs in terms of packaging technology, including MCP, EMIB, Foveros, Co-EMIB, ODI, MDIO, and so on, all of which are or will play their roles.
EMIB, also known as the embedded multi-chip interconnect bridge, is intel’s very successful packaging technology, typically representing Kaby Lake-G, which integrates the core of AMD Vega graphics, and the just-announced universal stand-alone GPU code-named Ponte Vecchio.
According to the latest information provided by Intel, EMIB is a complex multi-layered thin silicon chip smaller than a grain of rice that allows adjacent chips to transmit large amounts of data back and forth at several GB/s speeds.
Traditional interposer bridging designs are implemented by internally encapsulated multiple chips placed on essentially single-layer electronic substrates, and each chip is plugged in.
In contrast, EMIB wafers are smaller, more flexible and more economical, with up to 85% increasein bandwidth and a doubling or even triple d’etre for the next generation.
Intel revealed that EMIB has been quietly used in the world’s nearly 1 million laptops, FPGAs (field programmable gate array) devices, and as it becomes more mainstream, the range of applications will become more and more wide, including notebooks, servers, 5G chips, GPU graphics and so on.