Intel is working hard to polish the “Three-In” discrete graphics products, and chief architect Raja Koduri tweeted this week confirming that xe HP (high-performance Xe Core) had reached a milestone designed by the Indian team. It is expected to be the largest silicon wafer ever created in India, and even the world’s largest, to be called “dad-class”. The largest chip to date came from The U. S. Company, Which launched in August with 42,225 square millimeters of 42,225 square millimeters and 1.2 trillion transistors, according to the data.
Even high-performance GPUs, such sizes are not realistic for Intel Xe, speculating that Raja means the largest GPU silicon wafer, with an area estimated at around 800 square millimeters.
At the SC 19 Supercomputing Conference in November, Intel unveiled their Xe architecture GPU for high-performance computing, Ponte Vecchio (Vicio Bridge), the first Intel 7nm process, and the new DESIGN of the EU unit was expanded to 1,000. Will be used in the 10 billion times the Ultralight aurora of the U.S. Department of Defense.
However, it has not been officially confirmed whether Xe HP is corresponding to Ponte Vecchio.
Obviously, just completed the silicon design of the Xe HP will not be so early launch, and still 7nm, how the fastest also 2021. Next year, Intel will be the first to be a data center-oriented DG1 (temporary name) with 10nm.