When does intel come to mind, when must it be CPU or 10nm? For now, it’s just part of Intel’s job. Recently, Song Jiqiang, president of Intel China Research Institute, combed Intel’s work and achievements over the past five years at the Intel Technology Innovation Media Conference, analyzed the reasons and values of data-centric transformation, and provided us with a vision of the next generation of technology trends.
When does intel come to mind, when must it be CPU or 10nm? For now, it’s just part of Intel’s job. As early as four to five years ago, Intel was embarking on a data-centric transformation. By 2017, Intel has formally established its “PC-centric” transition to “data-centric” transformation, resulting in a complete computing architecture, storage, and connectivity solutions from software to hardware, from communications to computing to storage. All work and products are built around the concept of data-centric, and THE CPU is just a product branch in the data center chain. Mr Song says new services and experiences can only be created by translating data into business value. Next, we will follow President Song for you to comb through the five years 2015-2019 Intel’s technology development and future trends.
The driver of data-centric transformation first we look at one word that cannot be separated from that of data. Computing is a process, input is data, output has many kinds. The data has made a lot of differences.
This chart is very valuable, reflecting exactly three eras, or three decades. The big circle on the right is a decade after 2010, the middle is the decade of 2000 and the far left is before 2000. We know that before 2000, pc computing was the main focus, and very few servers and cloud computing were used. After the Internet boomed, it was only used to search for something, we are search-based web 1.0 era, those content is hidden in the Internet site, no use. But by web 2.0, after the first wave of the dotcom bubble burst, it was found that a small number of people provided data for everyone to search for, and could not constitute a big industry. Web 2.0 relies on user contribution data, which gives birth to the whole cloud computing, when Server and PC are just as important. After 2008, mobile phones gradually began to shift from functional phones to smart phones, from the former is mainly to make phone calls, to more can be used to surf the Internet and socialize, watch video. After 2010 began to officially enter the IoT era, more devices connected to the network. Then there’s AI, so that this data is not just simple storage, transmission, but the need to dig deep into the value of the inside, these sensors can be dispersed into a lot of front-end devices.
Let’s start with the amount of data. The figure above shows the trend chart of the quantity, divided into different colors, representing different magnitudes. Light blue is the development of the data center, the edge is calculated in the middle of the blue, the deepest is the terminal. It can be seen that the amount of data generated by the terminal is still the largest, and rising very quickly, and the volume of data centers is keeping rising slowly. The edge has barely expanded from the beginning, and then gradually expanded, and is now about the same amount of data in the data center. As more and more devices produce huge amounts of data, due to network carrying capacity and cloud storage constraints, we must sink more and more computing and storage that were originally processed by the data center in the cloud, sinking to the edge. Because the volume and quality of the data have changed so much, in 2015, Intel came up with the idea of starting to focus on data.
Important acquisitions over 5 years
Intel has made big acquisitions in the five years from 2015 to 2019. These acquisitions revolve around the concept of data-centricity. The acquisition of ThePGA’s leading manufacturer, Altera, in 2015, is done, and it represents one of the architectures that FPGA handles computing. In 2016, nervana was acquired as a custom AI chip that addresses an architecture of AI deep learning acceleration in the form of ASIC, which we call NPU. Intel’s original CPU, GPU, plus Altera’s FPGA, plus Nervana’s NPU, at this point in time Intel already has four different architectures. Mobileye and Movidius were also acquired in 2017. Mobileye was previously a partner with Intel to enter the driverless, smart driving market. After the acquisition of Mobileye, Intel also has a camera dedicated to the front-facing car for the automotive market, which should be called ADAS (Advanced Driver Assistance System), which is made up of software algorithms and software application accelerators called EyeQ. Movidius, acquired the same year, is actually a dedicated visual AI acceleration chip (VPU), but it is placed on the terminal side, like cameras, drones, and the previous year’s acquisition of Nervana was designed to address aI acceleration chips dedicated to the server side. So from an end-to-end perspective, the two acquisitions don’t overlap, but they’re all placed in the Artificial Intelligence Products division, which will include several different AI products. The acquisition of eASIC in 2018, we all know that FPGAs need a very specialized programming skills, after the output is in the FPGA hardware acceleration logic, but this if it is used in a large number of market, its price/performance ratio is not advantageous, eASIC is to form a set of automatic tools, Convert it into a design that can be done on ASIC, so that you take the good intellectual property core on the FPGA, which is actually a set of designs, we can turn it into ASIC relatively quickly. The same year Intel NetSpeed, acquired NetSpeed, will help improve its chip design tools, which can significantly reduce chip design costs. In 2019, Intel has just acquired Habana Labs, a technology company like Nervana that makes AI for servers, and Habana’s products have already been tested in some of the big cloud service providers.
Intel XPU Family
With the acquisitions of recent years, coupled with Intel’s own CPU and GPU, now Intel has a very complete chip solution for many different architectures, and we’re XPU. XPU, in fact, represents a variety of changes, X many changes include CPU, GPU, NPU, VPU, and FPGA. Also included is the Loihi neuromorphic computing processor and quantum computing processor QPU, which are all in the “X” variable range.
OneAPI: XPU’s unified software development platform
With so many different architectures, with existing programming ideas and methods, programmers will not be able to handle them and programming efficiency will be very inefficient. To this end, Intel introduced oneAPI, which enables XPU all-in-one development. We know that the CPU, GPU, FPGA three different hardware optimization, using different programming language and optimization ideas. For example, FPGAs usually need to understand the hardware architecture of engineers to do optimization, when you do not understand the hardware circuit design of the pipeline is why the design, you have no way to do optimization, so its requirements are closest to the bottom. With oneAPI, the situation is different, and development engineers don’t need to know exactly which XPU to program for. If you want to do a complete intelligent financial application now, it may be a few functions: human recognition function, biological authentication plus face and voice, may also have to do dynamic authentication. These functions as to whether to put on the CPU or CPU, or ASIC, engineers do not need to pay attention to this to oneAPI, one API compilation will know what hardware to use, you can choose different ways to accelerate. In short, let you run on this top of the most power-saving is just fine. So the goal of oneAPI is to make the programmer the simplest, the best performance, the lowest power consumption. OneAPI now has an industry program called Open Specification-Based, and we’re doing oneAPI not just with Intel products, but hardware by third parties, as long as a description of the product is provided, can be added.
Heterogeneous integration to create billion-level supercomputing
The so-called heterogeneous integration is to package many different types of different types of different processes into a larger chip, these processes can be 10nm, 14nm or even 20 Donnaami. Features can include: CPU, GPU, memory, high-speed interface, etc. Packaging technology can be implemented in 2.5D, 3D packages. Intel’s state-of-the-art Foveros 3D packaging technology, shown on the right side of the image above, can stack multiple chips in several layers. Foveros 3D encapsulates the different layers of the building as if we were building columns, in advance to make a good mouth, buried steel, rebar is copper cast, so that you can transfer up and down. EMIB 2.5D is made of horizontal connectivity, and small chips such as this can be embedded in the substrate to connect these different chips. It has higher bandwidth, low power consumption, and very small size. 3D Foveros technology is more advanced, but it is also more expensive, so use a smaller size, low power consumption, but also high performance of such heterogeneous chips. EMIB packaging technology is relatively inefficient, so it can be used in many chips. Lakefield is an example of 3D Foveros, a small strip that Intel showed at CES earlier this year, about 12cm x 2cm in size. Just such a small bar to get a laptop motherboard, you can see how powerful Foveros packaging technology is!
Another example is the Aurora Aurora supercomputing architecture, which is used to build E-level supercomputing units. Using 3D Foveros packaging technology, 2 Zhiqiang processors, 6 X-architecture GPUs, as well as memory, I/O, etc. are encapsulated into a chip, realizing the function of a previous motherboard.
Intel’s Future Computing
All of the above is based on some of the products that Intel has introduced over the past four years. Looking to the future, are these products ready to meet demand now? We feel that this is not enough, and that more cutting-edge products are needed to continue to develop the supplement, and Intel’s current future-oriented computing includes neuromorphic computing and quantum computing.
1. Neuromorphic calculation
Because if the intelligent computing and the human brain ratio, the existing products there are significant differences, the existing AI chip is only the use of the human brain neurons simple thinking, the specific way of working is completely different from the human brain, if closer to the human brain, then we need to use brain chip design, we call the neuromorphic computing.
As you know, doing an image recognition or training an accelerator that can do image understanding now requires a lot of power, some up to several thousand watts. And the human brain is only equivalent to 20 watts of a device, in fact, you go to training, do an image recognition, but also only use part of the power of the human brain, not the full power. From thousands of watts of power to do one thing to ten watts to do one thing, which is a thousand times the gap. Why does nPU consume so much electricity? Because it requires a large network that needs to be trained repeatedly through a lot of data, this network parameter may be hundreds of millions of times, hundreds of thousands of trainings. Neuromorphic computing is a simulation of the human brain, which is very abstract to do a neuron, and the mathematical model of neurons is very simple. Neuromorphic calculation is to try to model the two characteristics of the human brain, the first is event-driven, the human brain is usually mostly in a state of rest, when there is an event to come, according to the type of thing will move a part of the brain, for example, this thing is related to vision, vision to work, with sound-related, Just work with the sound, the rest is rest, so it’s event-driven. The second is that the human brain is related to a variety of inputs when dealing with some things, sound, image, touch is related to each other, time is relevant, and the time relationship of the input signal should also be taken into account. And this neural network generally does not consider the time information, it is a static input, forming a training batch, and then a batch of static energy in the past formed a training batch. If it’s going to do visual fusion, it needs to add another network. The human brain is obviously done with a brain, a brain to do a lot of things, so this kind of training out of things have a variety of integrated effects. So the purpose is to use the mechanism driven by human brain events to achieve power saving, but also to use a variety of ways to learn and training mechanism to achieve cross-cutting integration and related. This is what neuromorphic computing is particularly intended to achieve. Loihi’s chip, released by Intel at the end of 2017, is manufactured using a 14nm process, integrates 2.1 billion transistors, has a core area of 60 square millimeters, and internally integrates 3 Quark x86 CPU cores, 128 neuromorphic computing cores, 130,000 neurons, 130 million synapses. And is supported by a chain of programming tools, including the Python API.
2. Intel’s Quantum Computing Chip
There are two ways to make qubits. One is made up of a whole bunch of superconducting circuits (which most companies use), not a chip, strictly speaking. This approach requires ultra-low temperatures close to absolute zero to maintain the steady state of the quantum.
Another way is that a single electron silicon constitutes a spin quantum bit. This approach Intel is better at, and it is the future of Intel quantum computing. Intel has now made two spin quantum-bit chips on a 12-inch wafer. If this is successful, it can be done in quantum computing through the current silicon manufacturing industry chain, laying the foundation for commercialization. In addition, quantum computing, quantum chips to be able to be tested, and test equipment to operate at very low temperatures, either need to be close to absolute zero ultra-low temperature. To this end, Intel has introduced a control chip that works at low temperatures of 4 Kelvin (-269 degrees).
These are all further work to truly construct practical quantum systems. In general, these jobs are very difficult, both theoretical difficulty, but also engineering difficulty, each step forward to take several years. In the coming decade, Intel will continue to work together with “data-centric” and “six pillars of technology” to lay a solid foundation for the world of the future.