Jiangsu Huacun’s first PCIe 5.0 SSD controller: 12nm process, 2020 mass production

This year, with the release of the AMD Ryzen 3000 and X570 platform, the consumer market also brings the PCIe 4.0, Phison also immediately launched the first PCIe 4.0 master chip. However, in the next generation of SSD master control, the domestic Jiangsu Huacun  in the forefront, recently released the first PCIe 5.0 controller chip HC9001, using 12nm process, is expected to be mass production by the end of 2020.

江苏华存首发PCIe 5.0 SSD主控:12nm工艺 2020年量产江苏华存首发PCIe 5.0 SSD主控:12nm工艺 2020年量产江苏华存首发PCIe 5.0 SSD主控:12nm工艺 2020年量产

According to reports, Jiangsu Huacun Electronic Technology Co., Ltd. was established in January 2018, with a total investment of about 100 million yuan. Looking at China’s booming chip market and mature policy packages, this team of more than 30 Taiwan’s high-tech talents is determined to take root in Nantong’s research and development. Its research and development of 40 nanometer industrial-grade embedded storage “China core”, in a short period of one year, the rapid incubation, the indicators have reached the international first-class level, breaking by Samsung, Hynix  and other international mainstream manufacturers in the field of monopoly.

Huadian Electronics has previously been reported in the development of a new generation of controller chip, process of 12nm, but no specific specifications. Recently, the company officially released a new generation of master HC9001, the first support for PCIe 5.0 specification, which is currently known as the world’s first PCIe 5.0 master control.

According to the official introduction, the HC9001 controller Claims redefines the (AI) Computing Storage SSD architecture to integrate the PCIe Gen5 (32GT/s) host interface with ONFI4.1 (with a new, fully autonomous lynx) master chip architecture, published in 2019 1200MT/s) flash-side interface speed specifications, fusion of self-developed flash error correction algorithm and encryption algorithm, with domestic self-developed CPU core, innovative architecture AI Learning function record and learn the host-side use scene and external use environment changes to adjust the storage of data protection and management mechanism.

In addition, the HC9001 Master provides host-side autonomous performance control (SRIOV, STREAM, Open Channel, Dual Port) and AI Computing capabilities, enabling cloud and enterprise server customers to optimize system control over storage. To meet customer power consumption requirements for the next generation of servers, the HC9001 will perform 12nm FFC streams at TSMC’s 12-inch fab.

In terms of security, HC9001 main support national secret standards, integrated independent controlof security encryption algorithm and enterprise-class encryption algorithm, to assist the cloud and enterprise server manufacturers according to the end-user use scenario, to provide efficient security protection against different data.

However, the HC9001 master has not yet landed, supporting the PCIe 5.0 platform to see Intel next generation processor, is expected to end 2020 this master will be mass production.

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